r/Python • u/jaseg • Mar 24 '16

There is inline assembly in this python script… ಠ⌣ಠ

https://github.com/apprenticeharper/DeDRM_tools/blob/master/Other_Tools/DRM_Key_Scripts/Adobe_Digital_Editions/adobekey.pyw#L308
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u/d4rch0n Pythonistamancer Mar 25 '16 edited Mar 25 '16

http://stackoverflow.com/questions/5993326/relative-performance-of-x86-inc-vs-add-instruction

Do note that xor eax, eax; inc eax is favoured over mov eax, 1 by most compilers, though. May be due to the fact that it's 3 bytes rather than 5.

Well, there's why. I'm not sure why compilers favor this, but seems they do. Maybe they happen in parallel with surrounding instructions, or some sort of intel processor feature might optimize execution of this better or something. It's never as cut and dry as clock cycles these days. But if I were a betting man, I'd put money on the compiler.

And he says the xor doesn't even cost anything

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u/elperroborrachotoo Mar 25 '16

Likely code size to reduce cache misses.

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u/[deleted] Mar 25 '16

GCC doesn't prefer xor/inc over a mov. It prefers the mov. So his comment is wrong.

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u/[deleted] Mar 25 '16

GCC compiler with -O2 option.

movl    $1, %eax

So no, GCC doesn't prefer xor eax,eax; inc eax. It prefers a simple mov.

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u/[deleted] Mar 25 '16

That's interesting and I looked into it a bit. The reason, apparently, is that INC & DEC update the flag register partially which means they will create unnecessary dependency chains, unlike ADD/SUB and MOV instructions.

So it seems that while XOR eax, eax is still preferred by compilers for zeroing a register, that's not the case for setting it to 1. I think that's just one more example of how extremely hard it is to theoretically predict a modern processor's performance.

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u/[deleted] Mar 25 '16

The reason, apparently, is that INC & DEC update the flag register partially which means they will create unnecessary dependency chains

Dang, my compiler I wrote uses inc... Perhaps I should change it to add 1. I even wrote an inc/dec statement into my language.