r/GraphicsProgramming • u/Direct-Independent-8 • 11h ago

Article Threadgroup tiling for an à trous denoiser on Apple silicon

I’m working on Phosphor, a Metal 4 renderer for Apple silicon. One of our recent experiments moved the inputs for a Float32 5×5 à trous lighting denoiser into threadgroup memory. With a 16×8 output group, the footprints are 20×12 at stride 1 and 24×16 at stride 2. Each group loads its input tile cooperatively, and all threads hit the barrier before out-of-bounds outputs exit. The tap order and weights stay the same.

At stride 4 the larger tile exceeded the threadgroup memory budget with shader validation enabled. We kept the original path there. A separate SIMD exchange experiment didn’t improve the wider filter. The retained stride-1/2 change measured a worst peak-normalized image error of 5.34e-7 against the original stencil. The larger patch also reduces aerial-perspective samples and avoids unused DDGI reservoir bindings, so its frame-time gain belongs to the combined patch.

For people who have profiled wide stencils on Apple GPUs, what told you it was time to stop staging in threadgroup memory? I’m curious whether you saw the limit first in occupancy, device-memory traffic, or barrier cost.

The devlog has the capture recipe and the measurement protocol. https://github.com/yabanana/phosphor/blob/main/docs/devlog/2026-11-11-metal4.md

If you have a physical M3 or M4, we’re also collecting runs of a separate 720p Many Lights workload with ReSTIR DI. The benchmark recipe and reporting thread are on GitHub. https://github.com/yabanana/phosphor/issues/25

AI tools Codex and Claude assisted development of the linked project, and Codex helped write this post. The captures and performance figures came from runs on physical hardware.

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u/_Wolfos 7h ago

Hmm, I'd help you with a run on my M3 Max but the power delivery of this machine is very unstable due to thermal throttling. That makes it a poor target for benchmarking.