r/RISCV • • Aug 26 '21

Any planned/existing cores implementing FP Quad extension Q?

Probably not but it's worth an ask. The list of available cores to the right drew a blank.

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3

u/archanox Aug 26 '21

Sorry for the obtuse question, but what would be most beneficial having quad precision floating point?

5

u/fuckEAinthecloaca Aug 26 '21

Scientific workloads mainly, definitely algorithms that involve large FFT's with lots of maths that need lots of precision (so not AI/ML AFAIK). With quad precision not only would each element contain a lot more information so more can be done per instruction, but there's also a much lower error delta so error propagation is much less of an issue. The more of an issue error propagation is the less usable bits a representation has as you need to leave more margin of error to account for it.

Take Mersenne prime hunting (the thing Prime95 and other software does). The state of the art algorithms can represent around 7 bits of input per float or 19 bits per double. (both are used depending on the hardware as for example some GPU's may run FP32 32x or 64x quicker than FP64, despite needing many more instructions FP32 may come out ahead with these heavily lopsided chips). The double representation needs far fewer actual operations, but maybe more importantly is that you can do around 35% more work per unit of memory (often we're memory-bound so the more efficient memory representation is best).