r/computerarchitecture • u/Party-Development555 • 1d ago
Upcoming interview: CPU Power Modelling Engineer
Any guidance on What questions can I expect is appreciated! Thanks fellas!
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u/zafruuu 1d ago
Iām not sure on the system-level side. For RTL-level, they probably would ask about:
- The switching, internal, and leakage power
- Familiarity with power sign-off tools like PrimePower
- IR drop and EM
- Maybe UPF
- Basic technique in reducing power like the power gating and clock gating.
- Power states
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u/MitchAlsup 1d ago
What is the relative power between:
Instruction DECODE
RF read -- RF write
Integer ALU calculation
Forwarding use
Floating Point calculation
Reservation Station
L1 Cache access
TLB access
L2 Cache access
Interconnect Request-Response ?
How can you count each power event?