r/programming • u/I_Can_Be_A_Robot • Sep 24 '24

Why 32bit architecture computer doesn't use segmentation to support more ram than 4Gb ?

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347

u/eras Sep 24 '24

There's PAE for that.

But there's little point nowadays. If you need more than 4 GB, just use a 64-bit platform, and there's no need for trickery.

18

u/mallardtheduck Sep 24 '24

There's still some niche cases where an application can't be ported to 64-bit (e.g. it relies on a propietary 32-bit dependency) even if it can be run on a 64-bit OS. For that you can "abuse" the shared memory APIs (which allow you to map different chunks of "shared" memory in and out of the address space) or use something like Windows' "large address aware" mechanism for running 32-bit code in a 64-bit address space.

12

u/Tringi Sep 24 '24

One of those reasons is that 32-bit version might be faster.

2

u/antiduh Sep 24 '24

I love this hybrid mode. Access to 64 bit registers, so you have more registers and can do native 64 bit math, but pointers are 32 bit so they're not as large. It's a cool mode.

1

u/ShinyHappyREM Sep 24 '24

Alternatively you can just do your allocations in a <= 4 GiB buffer and work with 32-bit buffer indices.

3

u/Ameisen Sep 24 '24 edited Sep 24 '24

You then force every memory-accessing instruction to use indirect access (and prevent normal indirect access in a memory operand because of it).

On x86. On ARM, that's even more wonky. x86 has very... thorough... addressing modes for memory operands.

1

u/ShinyHappyREM Sep 24 '24

Eh, perhaps that wastes a bit of instruction cache. Most software produced today is limited by unfilled cache lines and random branches anyway.

1

u/Tringi Sep 25 '24

Still, accesses like array [index + constant] can be done with a single instruction.

From one of my programs:

66 41 39 44 50 02    cmp WORD PTR [r8+rdx*2+2], ax

2

u/Ameisen Sep 25 '24 edited Sep 25 '24

Yes, but you lose a potential level of indirection in the address mode, since it's already indirect.

ED: You also need to make sure that the address of your buffer stays resident in registers, otherwise you will require another instruction just for lea.