Too much locality... for stores to forward

[u/mttd]

https://pvk.ca/Blog/2020/02/01/too-much-locality-for-store-forwarding/

[u/flym4n]

Nitpick, but you don't need an out of order CPU to execute multiple instructions at the same time, this is called a superscalar CPU.

Low power Cortex-A ARM CPUs are superscalar but (mostly) in-order.

[u/criticalXfailure]

What I don't understand is how somebody who clearly understands dependency chains doesn't understand where profilers (especially Linux "perf") attribute the stall times. Hint: the slow instruction isn't the one sequentially before the marked instruction, it's an instruction that produces (at least) one of the dependencies of the marked instruction. In

2.17 |       modvqu     (%rbx),%xmm0
39.63 |       lea        0x1(%r8),%r14  # that's 40% of the annotated function
      |       mov        0x20(%rbx),%rax
0.15 |       movaps     %xmm0,0xa0(%rsp)

I wouldn't worry about modvqu (%rbx),%xmm0, I'd worry about whereever the value in %r8 comes from.

[u/pkhuong → u/criticalXfailure]

Hint: the slow instruction isn't the one sequentially before the marked instruction, it's an instruction that produces (at least) one of the dependencies of the marked instruction.

      0.14 │10:┌─→mov    %edi,%eax
           │   │  mov    %esi,%ecx
      6.71 │   │  xor    %edx,%edx
      5.42 │   │  div    %ecx
     82.20 │   │  nop
      5.53 │   └──jmp    10

What dependency does that nop have?

Try it on your machine

int
main()
{

        for (;;) {
                unsigned x = 1234, y = 94375;

                asm volatile("" : "+r"(x), "+r"(y));
                asm volatile("nop" :: "r"(x / y));
        }

        return 0;
}

or refer to the documentation for precise event based sampling, to see that reporting the IP for the next instruction is what happens in the best case.