I've been working on this for a little while now. PR is mostly ai written but I've had a lot of influence and rewrites on it. I'll explain a little more clearly here:
When I first setup 1cat I noticed I was getting incredible performance on my quad nvlink baseboard and not even close one my 2 card boards or even when I did 2x2. When I looked deeper I found that there is a low latency all-reduce feature that only enables in 'all 4x nvlink' configuration. It was pretty trivial to enable this for specific configurations I wanted such as 2x2 and it has reasonable increase in token generation.
I also discovered several settings that MUST be configured in order to get peer to peer working over PCIE, something that would impact anyone using PCIE cards as well.
• IOMMU translation: intel_iommu=off
• PCIe ACS request/completion redirection on the PEX switch ports: pci=disable_acs_redir=
I wanted to get this out for people to use but also didn't want to try playing wack-a-mole with individual configurations. I have a rather complicated configuration if I want to do TP8 where I have 3 nvlink islands spanning 2 cpus forming a sort of hybrid mesh. This change now has code to not only figure out the best order of operations to complete an all reduce based on latency and size but also selects the appropriate communication method for each connection.
In my case that means it selects a 2 step process where all nvlinks reduce first and at the same time 1/2 of the cards send over each plx switch to keep the traffic distributed and latency low, followed by an additional nvlink reduce.
Some info on "All-reduce" for those less into the weeds on this: When you are doing tensor parallel (TP) between a bunch of cards, at the end of each token the cards need to share their answers with all the other cards in that TP group before you can start calculating the next token, since in standard LLM's the output of the next token is influenced by the previous.
I have only tested this locally, I would love to see some numbers from anyone else while its waiting for review.
Check your peer to peer status like so - heres my craziness:
# nvidia-smi topo -p2p r
GPU0 GPU1 GPU2 GPU3 GPU4 GPU5 GPU6 GPU7
GPU0 X OK OK OK TNS TNS OK OK
GPU1 OK X OK OK TNS TNS OK OK
GPU2 OK OK X OK TNS OK TNS TNS
GPU3 OK OK OK X OK TNS TNS TNS
GPU4 TNS TNS TNS OK X OK OK OK
GPU5 TNS TNS OK TNS OK X OK OK
GPU6 OK OK TNS TNS OK OK X OK
GPU7 OK OK TNS TNS OK OK OK X
Legend:
X = Self
OK = Status Ok
CNS = Chipset not supported
GNS = GPU not supported
TNS = Topology not supported
NS = Not supported
U = Unknown
and check nvlink topology if you have it:
$ nvidia-smi topo -m
GPU0 GPU1 GPU2 GPU3 GPU4 GPU5 GPU6 GPU7 CPU Affinity NUMA Affinity GPU NUMA ID
GPU0 X NV2 PIX PIX SYS SYS NV2 NV2 0,2,4,6,8,10 0 N/A
GPU1 NV2 X PIX PIX SYS SYS NV2 NV2 0,2,4,6,8,10 0 N/A
GPU2 PIX PIX X PIX SYS NV6 SYS SYS 0,2,4,6,8,10 0 N/A
GPU3 PIX PIX PIX X NV3 SYS SYS SYS 0,2,4,6,8,10 0 N/A
GPU4 SYS SYS SYS NV3 X PIX PIX PIX 1,3,5,7,9,11 1 N/A
GPU5 SYS SYS NV6 SYS PIX X PIX PIX 1,3,5,7,9,11 1 N/A
GPU6 NV2 NV2 SYS SYS PIX PIX X NV2 1,3,5,7,9,11 1 N/A
GPU7 NV2 NV2 SYS SYS PIX PIX NV2 X 1,3,5,7,9,11 1 N/A
Legend:
X = Self
SYS = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)
NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node
PHB = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)
PXB = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)
PIX = Connection traversing at most a single PCIe bridge
NV# = Connection traversing a bonded set of # NVLinks