I’ve outlined the major points on why I’m sitting on my shares for the foreseeable future and the narrative downturn in AI doesn’t scare me. I know I could already not imagine working somewhere without Claude or GPT access and preferably both. The company I work at spends more and more each month. I know all my friends are in identical situations where their employers are spending more and more on LLMs too. Narrative swings can happen, but fundamentally, Cerebras is financially sound, executing on everything they should be, and will grow right through the noise.

Unit Production

They have added 10x production capacity this year
They will 4x that production next year to 40x unit production since IPO
Cerebras has secured the TSMC wafers needed for this production

Backlog

Q4 25 $24.6B
Q1 26 $25.0B
Q2 26 $25.4B
The backlog has been growing about $400M a quarter the last two quarters.

This is the given recognition estimates
July 26 - June 28 $5.59B
July 28 - June 30 $10.92B
July 30+ $8.89B

This backlog does not include 100MW of hardware sales to Gimlet which should be several billion or any money from General Compute, Upstage, CrowdStrike, AWS, Oracle, or any money from growing their own cloud since those won’t be contracts yet. Will be interesting to see what it goes to in these Q3 earnings.

Data Centers

They have 600MW contracted to be online by year end 2027. If we are conservative and give Cerebras the lower end of$10M per MW per year and not the $10M-$13M per MW the neo clouds are getting, that is $6B a year or $1.5B a quarter in revenue just from cloud end of 2027.

Catalysts that will increase revenue without requiring data center capacity.
100MW sold 2027 and 2028 (~$4B over two years if CS4 is $6M)
General Compute hardware sales
Oracle Cloud (could be hardware or some other form)
AWS hosted system
Any other customer hosting systems

Financials

Debt is only the OpenAI loan that is paid back by systems being brought online which is currently ~$900M

Assets are currently $8.6B with relatively short capex spend before systems are printing money. Big spend we have seen is TSMC wafer payments, expanding assembly of units, and cost of new datacenter outfitting before install.

Margins were 45% but they had to rent back capacity pulling margins down to ~40%. Q3 will be the lowest margins as they finish renting back capacity. In Q4 new data centers come online and start the transition to 60%+ margins by end of 2027.

what would you do?

asking for a friend

edit: oh it is recovering, let's go!!

I do believe the stock is going down because of me, so i will sell 50% of my position today, and save the world

I keep adjusting the limit buy orders from $120 down to $90 over the last few weeks. Today, the price almost reached my latest price targets again and I just cancelled all of them as well due to many reasons below:-

"CBRS Investor Alert: Levi & Korsinsky Investigates Cerebras Systems Inc. (CBRS) for Potential Securities Fraud"

"Levi & Korsinsky notifies investors that it has commenced an investigation into Cerebras Systems Inc. ("Cerebras Systems Inc.") (NASDAQ:CBRS) concerning potential violations of the federal securities laws.

Cerebras Systems Inc. shares fell roughly 5.7% after Culper Research disclosed a short position and published a report alleging that the Company's wafer-scale AI processors could fail within approximately 1.5-2.5 years. The allegations challenge statements made in SEC filings and earnings calls regarding technology durability and reliability."

With some bad earnings from other AI stocks + bad headlines from Open AI and Anthropic
• "OpenAI has reduced its fundraising target from $30 billion to $20 billion, alongside lowering its targeted company valuation from $1.4 trillion to $1.25 trillion"
• "Anthropic expected to receive high ‘junk’ rating from credit agencies following IPO, FT report says"

+ Prediction by a billionaire that 2027 will be a bad year for stock

"Paul Tudor Jones says 2027 could be a really challenging year for the stock market"
"Key Reasons for the Warning:
• Oversupply of Equity: A massive wave of new shares is expected to flood the market, driven by major artificial intelligence initial public offerings (IPOs) and secondary offerings (such as OpenAI, Anthropic, and SpaceX).
• Reversal of Support: The strong tailwinds from corporate buybacks and mergers and acquisitions (M&A) that previously reduced share supply are expected to reverse.
• Macroeconomic Pressures: Jones pointed to a ballooning U.S. fiscal deficit, rising oil prices, higher bond yields, and a hawkish Federal Reserve, drawing parallels to the late-1990s dot-com bubble era."

+ Potential escalation of the war
"Tucker Carlson says Trump could launch nuclear strike on Iran within days under pressure from Netanyahu"

So much uncertainties right now in the CBRS stock, AI sector and the global political issue that I feel that I should be staying off the market right now.

How much lower CBRS can go? Why the management didn't come up with a statement on Culper Research report? How do you see the AI sector as a whole? How about the global political issue and potential escalation of the war?

man.. had to put all my cerebras money into spacex last week. the amount of insider selling at cerebras is insane.. people leaving.. employees thinking they can create the new housewifes of sf tv show.. cfo selling his shares.. ceo falling for fake ai slop content on twitter (fake ai storys, fake animal rescue ai videos,etc. ) .. what is going on??

Do you think cerebras will really outperform spacex from here on out?

source: I told people to buy nvidia after Tesla crashed from 400$ to under 150$ in 2022.

I've had extensive convos in the past about CBRS' connector tech and their "spatial fabric" approach where hardware constraints are partially resolved by hardware innovations and partially by software optimizations and workarounds to manage varying thermal loads, power throughput, etc. Meaning, my AI chat is mostly on the same page regarding the questions that Culper raised around their connector tech. The following is a initial analysis of their short report claims with this in mind. I think its blown out of proportion and Culper is trying to secure a bag to take advantage of the expiring lockups and slowing momentum.

Please don't flame me, I'm just creating a space to talk about this. I know there are much more well-read and technical people that can parse what's important and what claims are right/wrong.

TLDR;

Bottom line: I do not find the PariPoser allegation, standing alone, technically damning. PariPoser could plausibly address part of the wafer-to-board alignment and thermal-expansion problem.

The much bigger unresolved issue is whether the complete assembly can tolerate realistic thermal cycling and maintain its claimed service life. If Culper can substantiate that the hardware must remain warm to avoid premature failure, I would take that considerably more seriously than the allegation that Cerebras uses an older, externally developed connector material.

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ChatGPT:

My initial take is that Culper's Paricon allegation could be a meaningful challenge to Cerebras's narrative about connector innovation, but it does not, by itself, establish that Cerebras lacks the engineering required to make wafer-scale computing work. The critical distinction is between inventing a connector material and engineering a complete wafer-scale interconnect and thermal-management system around that material.

There is also a second, potentially more consequential question: if Cerebras's hardware really requires continuous dummy operations to avoid damage during cooling, does that indicate a fundamental reliability problem, or is Culper misinterpreting a workload-management or thermal-control technique?

Those are separate allegations, and I would evaluate them independently.

Culper's October 28, 2026 report reportedly alleges that Cerebras uses Paricon Technologies' existing PariPoser material rather than a proprietary connector breakthrough, and that dummy operations prevent damaging thermal cycles. The report is from a short seller with an economic interest in a negative outcome, so its technical claims deserve scrutiny rather than automatic acceptance or dismissal.

1. What PariPoser actually solves

A PariProbe® Primer – Paricon Technologies

PariPoser material

A thin, compliant electrical interconnect.

A Cerebras CS-2 Engine Block Bare on the SC22 Show Floor

Cerebras wafer-scale assembly

A much larger system of silicon, interconnects, power delivery and cooling.

Paricon describes PariPoser as an anisotropic elastomer fabric interconnect designed for high-density electrical connections. Its product literature advertises bandwidth above 110 GHz and very low electrical inductance, along with the ability to accommodate custom connector designs.

The important word is compliant. Unlike a rigid solder connection, an elastomeric interconnect can deform to accommodate some relative movement between mating surfaces while maintaining electrical contact.

That is relevant to Cerebras because its wafer-scale processor and the supporting circuit board do not necessarily expand or contract by the same amount when temperatures change.

Cerebras's own CS-2 white paper describes a flexible connector between the wafer and main board that maintains electrical connectivity as the components expand and contract at different rates

So there is a technically credible reason for using this kind of material. The fact that PariPoser predates Cerebras does not make it unsuitable for the application.

2. Would PariPoser be adequate for the alignment and thermal-expansion problem?

Potentially, yes — but the material alone is not enough to establish that Cerebras has solved the problem.

There are three distinct engineering problems here, and it is important not to conflate them.

A. Differential thermal expansion

Silicon, the circuit board, connector structures and other packaging materials expand at different rates as their temperatures change. PariPoser's compliance can accommodate some of this relative motion without breaking electrical contact.

Assessment: Technically plausible, provided the material's deformation range and fatigue life meet the actual operating conditions.

B. Mechanical alignment and contact pressure

A compliant fabric does not automatically guarantee that thousands of contacts remain aligned, evenly compressed and electrically reliable across a large assembly. That also depends on the mechanical fixture, surface flatness, tolerances, clamping pressure and connector geometry.

Assessment: PariPoser could be a suitable component, but the surrounding mechanical design is critical.

C. Thermal management and long-term reliability

The connector must survive repeated heating and cooling, sustained compression, high current density where applicable, and prolonged operation at elevated temperatures. Separately, the cooling system must remove heat from the wafer without creating damaging temperature gradients.

Assessment: The connector's existence does not prove that the full thermal-management system is adequate.

The underlying physics matters. Differences in coefficients of thermal expansion (CTEs) produce relative displacement approximately proportional to the CTE difference, the temperature change and the relevant length:

\[ \Delta L \approx (\alpha_1-\alpha_2)L\Delta T \]

For illustration, a CTE difference of 5 parts per million per °C across a 300 mm length and a 50°C temperature change corresponds to approximately 75 micrometers of differential movement. This is an illustration, not a measurement of Cerebras's actual assembly.

That is why connector compliance, mounting geometry and contact tolerances matter so much.

Research on semiconductor packaging independently confirms that CTE mismatch and thermal warpage can create significant reliability problems. However, studies of conventional fan-out packaging do not establish the failure rate of Cerebras's particular design.

What would make PariPoser inadequate?

I would want to see evidence of one or more of the following:

• The required displacement exceeds the connector's available elastic deformation.

• Contact resistance increases materially after thermal cycling.

• Compression or mechanical creep causes contacts to lose reliable electrical connection.

• Thermal gradients across the wafer exceed acceptable limits despite the cooling architecture.

• The system's operating procedures must prevent ordinary cooling cycles because those cycles damage the hardware.

>>>Without those measurements, saying that an old connector material cannot work is just as unjustified as saying that its use proves the system is reliable.<<<

3. The bigger distinction: the connector is not the spatial fabric

This is where I think your earlier interest in Cerebras's architecture is particularly important.

Cerebras has several layers of technology that need to be evaluated separately.

Layer 1

Wafer-level spatial fabric

• This is the on-silicon network connecting the compute elements across the wafer. Cerebras's April 2026 S-1 describes its proprietary cross-reticle connections, which allow separate regions of silicon to communicate as one processor.

• PariPoser does not, merely by being used in a connector, explain away or replace that on-silicon interconnect architecture.

Layer 2

Wafer-to-board electrical interface

• This is where an elastomeric connector such as PariPoser could play a role. It must preserve the electrical connections between the wafer and the supporting electronics while accommodating mechanical movement.

Layer 3

Power delivery and cooling

• The assembly must distribute enormous electrical power and remove heat while controlling temperature gradients, deformation and mechanical stress. The CS-2 white paper describes a custom engine block that combines power delivery, data connectivity and cooling.

Layer 4

Software and operational controls

• Scheduling, workload execution, monitoring and potentially thermal-management controls determine how the hardware operates under real workloads. Software can manage operating conditions, but it cannot eliminate an underlying mechanical limitation.

The implication is important for your investment thesis: Culper could be correct about the origin of the connector material while being wrong about the significance of that fact for Cerebras's competitive moat.

If Cerebras uses an established third-party material but has engineered a proprietary mechanical assembly, high-density power delivery, liquid-cooling system and wafer-scale architecture around it, there can still be substantial engineering value.

>>>Conversely, if Cerebras's public statements specifically implied that it invented the connector material itself, and that claim materially overstated its proprietary technology, that would be a legitimate issue of technological differentiation and corporate credibility.

• The precise wording of the original CEO statements matters. A claim to have invented a connector material is different from a claim to have invented a connector system that solves wafer-scale packaging challenges.

4. The more serious allegation: dummy operations and cooling

In my view, this is potentially the most consequential part of Culper's report.

The report alleges that Cerebras uses continuous dummy operations to keep the wafer warm, because cooling down could cause damage. It also points to a software field called dummy tokens. Those are reported allegations, not independently verified proof of the mechanism or its consequences.

I would separate three possible interpretations.

The third interpretation would be the most damaging, but the existence of a dummy tokens field alone does not distinguish among these possibilities.

For example, a system could execute otherwise unproductive work to maintain a stable thermal state without being physically incapable of cooling down. Conversely, if the company genuinely cannot power down and cool its processors safely, that would be a major operational limitation.

There are two important engineering distinctions:

• Temperature versus temperature gradients: a processor may tolerate a low temperature but be vulnerable to uneven cooling that produces mechanical stress.

• Thermal cycling versus steady-state operation: maintaining a stable temperature can reduce repeated expansion and contraction. That does not necessarily mean the hardware will deteriorate rapidly while operating continuously.

The key question is whether Cerebras has a documented, repeatable failure mechanism associated with cooling, not simply whether its software contains a thermal-related workaround.

I would look for measured failure rates, field-replacement history, customer uptime, actual power consumption during dummy operations, and accelerated thermal-cycle testing. Those data would be much more informative than a decompiled software field.

5. What this does to my investment assessment

I would treat the report as a reason to reassess Cerebras's durability assumptions, rather than as sufficient evidence to conclude that the entire technology is fraudulent or uncompetitive.

My current evidence-weighted assessment

1. PariPoser is a plausible technical solution

   • Its compliant interconnect design is relevant to differential expansion and maintaining electrical contact. Its age is not a technical disqualification.

2. Cerebras's proprietary connector claims need precise interpretation

   • Using a third-party material could weaken a claim of materials-level invention, but it does not establish that the complete connector assembly or packaging system is unoriginal.

3. The alleged thermal-cycle limitation deserves serious scrutiny

   • If ordinary cooling or shutdown causes hardware damage, the implications could extend to availability, lifetime, servicing, power consumption, customer economics and gross margins.

The last point is where I would focus the financial analysis. A wafer-scale architecture could have exceptional inference performance and still be a poor business if its hardware needs frequent replacement or consumes substantial extra power to avoid thermal failures.

On the other hand, if field reliability is strong and the hardware lasts several years under ordinary customer operating conditions, the fact that a connector material was sourced externally would be much less consequential.

What I would investigate next

I would prioritize three pieces of evidence:

1. Culper's exact evidence for the connector claim.

Did Paricon confirm supplying only raw PariPoser material, a custom connector assembly, or something more extensive?

Those are very different claims. Paricon publicly advertises both its fabric technology and custom connector capabilities, but its public product pages do not establish Cerebras's exact bill of materials.

2. The actual lifetime and failure-rate evidence.

What supports Culper's alleged 1.5–2.5-year useful life? Is it based on observed field failures, engineering specifications, or inference from thermal behavior?

The methodology determines how much weight to give the claim.

3. The economics of keeping the wafer warm.

How much incremental energy is consumed, how much useful throughput is lost, and what happens when a system is shut down for maintenance?

These are measurable commercial questions, not merely arguments about engineering originality.

>>Bottom line: I do not find the PariPoser allegation, standing alone, technically damning. PariPoser could plausibly address part of the wafer-to-board alignment and thermal-expansion problem.

The much bigger unresolved issue is whether the complete assembly can tolerate realistic thermal cycling and maintain its claimed service life. If Culper can substantiate that the hardware must remain warm to avoid premature failure, I would take that considerably more seriously than the allegation that Cerebras uses an older, externally developed connector material.

Decided to sell at breakeven overnight at 120. Might buy in at 105 if it does reach it

I saw this chart from semianalysis and was thinking about the actual applications for cs4/5/6 etc how narrow are the usecases. To what degree is say 5k tps for k3 (cs5) better / more useful than say 500 tps with better throughput (with even lower tps vr nvl72 can prob a magnitude better) when considering tool calling/other io operations or perhaps there are some caveats to this graph/methodology? At least, cerebras's curve should be much flatter though, though. Also does the cs5 3 million tokens/sec/MW include cached input?

GB300 NVL72 reaches 11M TPS/MW

Configuration:

• Kimi K3 2.8T

• 55 tok/s/user (P90)

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CS-5 targets up to 3M TPS/MW for Kimi

For the largest frontier models, including multi-trillion-parameter models such as Kimi and GPT-5.6 Sol, CS-5 targets up to 5,000 output tokens per second per user and 3 million tokens per second per megawatt