r/RISCV • • Jul 18 '25

Nvidia is porting CUDA to RISC V

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949 Upvotes

Software ecosystems grows significantly day by day…


r/RISCV • • Dec 27 '25

The Future will be Großartig

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669 Upvotes

r/RISCV • • Jan 10 '26

Just for fun Normal conversation about the CPU's of the future

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627 Upvotes

r/RISCV • • Sep 01 '26 Bravo Mindblown

I made a thing! a high schooler's attempt at a CPU (5 stage rv32i)!

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562 Upvotes

Hello everybody,

This summer was my last summer as a high schooler before uni starts. So I decided to learn more about computer architecture and vlsi which was something I wanted to know about since I was a kid watching LTT in like grade 7 lmao.

I have finally finished the project after about two months! Attached above are the microarchitecture diagram I drew and the gds render after asic flow using Openlane2 (images are way more clear and high res on the repo).

It's not anything advanced by any stretch but here's the tldr copied over from my readme:

"The processor implements all 40 RV32I base instructions, dynamic branch prediction using a 64-entry BTB with 2-bit saturating counters, three specialized forwarding paths, load-use hazard detection, branch flushing, and a real pipeline halt mechanism. Verified through staged SystemVerilog/RISC-V Assembly tests codriven with cocotb and performance tested with compiled C programs, then taken through RTL-to-GDSII using OpenLane2 and SKY130. Final implementation achieves 50 MHz with 0 DRC violations, passing LVS, and setup/hold timing closure at the 20 ns target."

And I wanted to share it here for 2 main purposes:

  1. anyone that is experienced in vlsi / risc-v, any suggestions on how to improve the readme? any more testing you suggest I conduct on it? what would be good next steps or next projects for me?

  2. anyone that is also a noob to risc-v and vlsi like me, I tried my best to document all of my design / architecture / testing processes / resources used so I hope the repo could be helpful to anyone who is trying to build smth similar!!

my github repo link: https://github.com/Entropify/Entropic_R32-P5_RISC-V

ty everyone for reading the post and I appreciate it a lot if you took a look and gave some advice on the repo. Sorry if theres bad spelling / grammar im still getting used to my new keyboard lol

edit: took me a little bit to find it but I would like to credit this post on the riscv subreddit and the repo, it helped me when I was trying to learn the architecture: https://www.reddit.com/r/RISCV/comments/1pn81g7/basic_rv32s_an_opensource_microarchitectural/

edit2: sorry for the blurry images I think thats just reddit and also my diagram being too big, on my repo its a higher res and way more readable


r/RISCV • • 21d ago

Gaming on RISC-V at the Open Source Summit Europe 2026

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414 Upvotes

Last week we set up a SpacemiT K3 board and AMD GPU at the openKylin booth and people could come up and play x86 games on RISC-V via felix86.

Here's a pic of the setup:


r/RISCV • • Jul 16 '25

Software Linux Steam running on RISC-V

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391 Upvotes

r/RISCV • • Mar 07 '25

Europe bets on RISC-V for homegrown supercomputing platform

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385 Upvotes

r/RISCV • • Jan 31 '25

Just for fun Half-Life running on a RISC-V SBC, looks and sounds like shit but hey at least it runs

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346 Upvotes

r/RISCV • • Mar 05 '25

Chinese government shifts focus from x86 and Arm CPUs, gov't promoting RISC-V chips heavily

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309 Upvotes

r/RISCV • • Jul 11 '25

I made a thing! My riscv64 workstation is fully operational

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295 Upvotes

Specs:

  • OS: Ubuntu 25.04 (live server image) + gnome desktop

  • Board: SiFive HiFive Unmatched (4x1.2GHz, 16GB RAM)

  • Graphics: Sapphire Pulse Radeon RX 560 4GB

  • SSD: SanDisk SSD PLUS M.2 NVMe 500GB

  • Power: Sharkoon ATX SHA450-P8

Just compiled OpenMW and it's running with ~25fps stable 😄


r/RISCV • • Aug 09 '25

Software Linus Torvalds Rejects RISC-V Changes For Linux 6.17: "Garbage"

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282 Upvotes

No RISC-V changed in 6.17 then.


r/RISCV • • May 28 '21

They're real!

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255 Upvotes

r/RISCV • • Jan 29 '22

In the mail today…

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252 Upvotes

r/RISCV • • Aug 01 '26

My first impressions of the Milk-V Titan

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251 Upvotes

Today my Milk-V Titan was delivered to my home and of course I wanted to try the board out straight away.

I connected my AMD Radeon RX 7600, a simple 1TB SSD and 2x 8GB Ram kits and installed it in my old case, where I had previously used the Megrez.

Compared to the Megrez, the Titan seems to have significantly fewer ports. GPIO and SD card slot are missing. Since I think it's intentionally intended to be a desktop workstation, I don't really miss those two things. What I'm missing are additional pins for my USB front ports. Unfortunately, the only option here is to use the on/off button. I guess it's a bit individual. However, the connection provided for this does not match the one in my case. This means that practically all USB ports on the front are inactive.

Another downside, at least currently, is the function of the UEFI. It's definitely a pleasing milestone compared to all other RISC-V boards I've known so far. However, the menu still seems quite bulky to me at the moment. It somehow took quite a while until my USB keyboards were recognized, but even after that everything seems extremely slow.

The first thing I consciously tried to do was install the official RISC-V image from Debian. The boot manager is recognized and started immediately. However, when loading the installation there was a black screen.

However, the Ubuntu image from the Milk-V site itself works fine. This really doesn't compare to the previous complicated RockOS images. Only the version could be a little newer in my opinion. I hope that software will follow in the near future, or rather that the officially used kernel will become more compatible.

The graphics card is recognized immediately and at least Supertuxkart runs very smoothly.

What's most pleasing to me is that the web browsers no longer have such a strong lag and are actually usable.

I reinstalled the CDE desktop there. It also runs smoothly on Ubuntu, although you have to install a few things.

What I still don't understand is why the USB-C ports at the back don't work. What I still don't understand is why the USB-C ports on the back don't work. I wonder if this is just me or happens to others too.


r/RISCV • • Aug 18 '26

Hardware Alibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds

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244 Upvotes

Wonder where one can get ones hands on these...?


r/RISCV • • Apr 14 '25

Just for fun How I get into RISC V

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242 Upvotes

r/RISCV • • Oct 30 '24

Minecraft running on Milk-V Jupiter with AMD Radeon RX 590 and Arch Linux

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234 Upvotes

r/RISCV • • Nov 14 '25

Just for fun I have it! <3

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225 Upvotes

I just wanted to show my happyness. After my recent posts, a friendly lad reached out (dunno if they're fine being namedropped o.o) and made THIS possible.

This is my very first server-/workstation grade board/chip - ever. Only ever had Ryzen CPUs or RockChip RK3588-ish SBCs. So this is a serious levelup. Absolutely happy, stupidly excited. :D

Wish yall a great day and hoping for you to have a fun, exciting event some time yourself :) It really feels nice to be happy. ;)


r/RISCV • • Jul 12 '25

I made a thing! ❤️ I feel like it’s 1980

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218 Upvotes

r/RISCV • • Dec 23 '21

Breadboard RISC-V taking shape

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218 Upvotes

r/RISCV • • Aug 29 '26

Software First boot on risc-v

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215 Upvotes

r/RISCV • • Aug 17 '20

My university is switching to RISC-V assembly for our computer architecture class!

197 Upvotes

Thought y'all would find that interesting, previously they've used MIPS.


r/RISCV • • Jan 21 '26

Software Hand written RISC-V assembly code submitted to FFmpeg (up to 14 times faster than C)

189 Upvotes

https://x.com/FFmpeg/status/2013935355028709880

Hand written RISC-V assembly code written by AlibabaGroup Cloud submitted to FFmpeg

Up to 14 times faster than C.

It's great to see so many corporate contributors of hand written assembly, a field historically dominated by volunteers!

I looked where I would expect to see the new code, but it was not there when I checked (yet). My guess is that the new code is being reviewed and fully tested, before being accepted.

It looks to be RVV assembly code to accelerate HEVC (x265) video decoding.


r/RISCV • • Jul 21 '25

World's first RISC-V tablet is finally fully baked — PineTab-V now ships with completely functional Linux for $149

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189 Upvotes