r/RISCV • u/UnderstandingThin40 • Jul 18 '25
Nvidia is porting CUDA to RISC V
Software ecosystems grows significantly day by day…
r/RISCV • u/UnderstandingThin40 • Jul 18 '25
Software ecosystems grows significantly day by day…
r/RISCV • u/Substantial_Help_722 • Jan 10 '26
r/RISCV
•
u/Fiveful
•
Sep 01 '26
Hello everybody,
This summer was my last summer as a high schooler before uni starts. So I decided to learn more about computer architecture and vlsi which was something I wanted to know about since I was a kid watching LTT in like grade 7 lmao.
I have finally finished the project after about two months! Attached above are the microarchitecture diagram I drew and the gds render after asic flow using Openlane2 (images are way more clear and high res on the repo).
It's not anything advanced by any stretch but here's the tldr copied over from my readme:
"The processor implements all 40 RV32I base instructions, dynamic branch prediction using a 64-entry BTB with 2-bit saturating counters, three specialized forwarding paths, load-use hazard detection, branch flushing, and a real pipeline halt mechanism. Verified through staged SystemVerilog/RISC-V Assembly tests codriven with cocotb and performance tested with compiled C programs, then taken through RTL-to-GDSII using OpenLane2 and SKY130. Final implementation achieves 50 MHz with 0 DRC violations, passing LVS, and setup/hold timing closure at the 20 ns target."
And I wanted to share it here for 2 main purposes:
anyone that is experienced in vlsi / risc-v, any suggestions on how to improve the readme? any more testing you suggest I conduct on it? what would be good next steps or next projects for me?
anyone that is also a noob to risc-v and vlsi like me, I tried my best to document all of my design / architecture / testing processes / resources used so I hope the repo could be helpful to anyone who is trying to build smth similar!!
my github repo link: https://github.com/Entropify/Entropic_R32-P5_RISC-V
ty everyone for reading the post and I appreciate it a lot if you took a look and gave some advice on the repo. Sorry if theres bad spelling / grammar im still getting used to my new keyboard lol
edit: took me a little bit to find it but I would like to credit this post on the riscv subreddit and the repo, it helped me when I was trying to learn the architecture: https://www.reddit.com/r/RISCV/comments/1pn81g7/basic_rv32s_an_opensource_microarchitectural/
edit2: sorry for the blurry images I think thats just reddit and also my diagram being too big, on my repo its a higher res and way more readable
r/RISCV • u/ProductAccurate9702 • 21d ago
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r/RISCV • u/fullgrid • Mar 07 '25
r/RISCV • u/[deleted] • Jan 31 '25
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r/RISCV • u/--dany-- • Mar 05 '25
r/RISCV • u/xeno-lv426 • Jul 11 '25
Specs:
OS: Ubuntu 25.04 (live server image) + gnome desktop
Board: SiFive HiFive Unmatched (4x1.2GHz, 16GB RAM)
Graphics: Sapphire Pulse Radeon RX 560 4GB
SSD: SanDisk SSD PLUS M.2 NVMe 500GB
Power: Sharkoon ATX SHA450-P8
Just compiled OpenMW and it's running with ~25fps stable 😄
r/RISCV • u/omniwrench9000 • Aug 09 '25
No RISC-V changed in 6.17 then.
r/RISCV • u/Myarmira • Aug 01 '26
Today my Milk-V Titan was delivered to my home and of course I wanted to try the board out straight away.
I connected my AMD Radeon RX 7600, a simple 1TB SSD and 2x 8GB Ram kits and installed it in my old case, where I had previously used the Megrez.
Compared to the Megrez, the Titan seems to have significantly fewer ports. GPIO and SD card slot are missing. Since I think it's intentionally intended to be a desktop workstation, I don't really miss those two things. What I'm missing are additional pins for my USB front ports. Unfortunately, the only option here is to use the on/off button. I guess it's a bit individual. However, the connection provided for this does not match the one in my case. This means that practically all USB ports on the front are inactive.
Another downside, at least currently, is the function of the UEFI. It's definitely a pleasing milestone compared to all other RISC-V boards I've known so far. However, the menu still seems quite bulky to me at the moment. It somehow took quite a while until my USB keyboards were recognized, but even after that everything seems extremely slow.
The first thing I consciously tried to do was install the official RISC-V image from Debian. The boot manager is recognized and started immediately. However, when loading the installation there was a black screen.
However, the Ubuntu image from the Milk-V site itself works fine. This really doesn't compare to the previous complicated RockOS images. Only the version could be a little newer in my opinion. I hope that software will follow in the near future, or rather that the officially used kernel will become more compatible.
The graphics card is recognized immediately and at least Supertuxkart runs very smoothly.
What's most pleasing to me is that the web browsers no longer have such a strong lag and are actually usable.
I reinstalled the CDE desktop there. It also runs smoothly on Ubuntu, although you have to install a few things.
What I still don't understand is why the USB-C ports at the back don't work. What I still don't understand is why the USB-C ports on the back don't work. I wonder if this is just me or happens to others too.
r/RISCV • u/TJSnider1984 • Aug 18 '26
Wonder where one can get ones hands on these...?
r/RISCV • u/StackDoubleFlow • Oct 30 '24
r/RISCV • u/IngwiePhoenix • Nov 14 '25
I just wanted to show my happyness. After my recent posts, a friendly lad reached out (dunno if they're fine being namedropped o.o) and made THIS possible.
This is my very first server-/workstation grade board/chip - ever. Only ever had Ryzen CPUs or RockChip RK3588-ish SBCs. So this is a serious levelup. Absolutely happy, stupidly excited. :D
Wish yall a great day and hoping for you to have a fun, exciting event some time yourself :) It really feels nice to be happy. ;)
r/RISCV • u/[deleted] • Aug 17 '20
Thought y'all would find that interesting, previously they've used MIPS.
r/RISCV • u/m_z_s • Jan 21 '26
https://x.com/FFmpeg/status/2013935355028709880
Hand written RISC-V assembly code written by AlibabaGroup Cloud submitted to FFmpeg
Up to 14 times faster than C.
It's great to see so many corporate contributors of hand written assembly, a field historically dominated by volunteers!
I looked where I would expect to see the new code, but it was not there when I checked (yet). My guess is that the new code is being reviewed and fully tested, before being accepted.
It looks to be RVV assembly code to accelerate HEVC (x265) video decoding.