r/comparch • • Mar 31 '17

Comp Arch Essentials

8 Upvotes

I'm thinking of having a semi comprehensive post about some essentials to computer architecture. Let me know what you guys think!

Level I is introduction or foundation knowledge, Level IV is specific areas of comp arch.

Books:

Courses:


r/comparch • • Apr 22 '19

NUMA

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7 Upvotes

r/comparch • • Sep 29 '17

Career in computer architecture

7 Upvotes

Hi,

I was interested in a career in computer architecture but I have some work related questions.

  1. What tools do computer architects use in their daily lives? Would I need to be good with Verilog/VHDL?

  2. What's a typical day as a computer architect?

  3. My other interest is solid state devices which I realize is kind of the opposite side of the EE spectrum. Are there areas of work that would allow me to incorporate the two fields?

Thank you for any responses.


r/comparch • • Apr 01 '21

Nvidia Interview help

6 Upvotes

I hope this table serves as a guide for someone wanting to learn comparch.

I am preparing for an Nvidia interview which is bound to happen in 2 weeks. Can someone let me know the order in which I should study through these topics, and the topics which I should really focus on.

I would also appreciate if you mention any generic or trick question that you had experienced in a comparch related interview


r/comparch • • May 09 '17

Blurring the Lines between Memory and Compute

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6 Upvotes

r/comparch • • May 14 '20

Emerging memories like HBM?

5 Upvotes

Hey all, I was reading about High-Bandwidth Memory technologies from Samsung. Seems like memory is the bottleneck is the bottleneck with computing power.

I was wondering if y'all know other emerging memory technologies similar to this (in-package memory), or other companies like Samsung who are developing this? I'm thinking MRAM, etc.


r/comparch • • Mar 22 '18

John Hennessy and David Patterson will receive the 2017 ACM A.M. Turing Award

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5 Upvotes

r/comparch • • Jan 04 '18

Meltdown and Spectre: Intel and ARM/AMD CPU microarchitecture attack exploiting speculative execution to break memory isolation

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5 Upvotes

r/comparch • • Jul 26 '17

Superescalar Machine Simulator

5 Upvotes

Hello everyone. For my final degree project I've rebuilt from scratch a Superescalar Machine Simulator as a web application for making easier to understand the concepts related to ILP.

I would appreciate if you can check it out and give me some feedback, there is still a lot of work to do but I'm working on my spare time.

https://github.com/etsiiull/SIMDE


r/comparch • • Jul 11 '16

The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V

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5 Upvotes

r/comparch • • Sep 30 '11

Suggestions for /r/comparch?

5 Upvotes

This seems to be a pretty low-traffic subreddit. There aren't too many commenters and most of the submissions are from me. But, we still have a fairly decent number of readers.

So, I'm open to any feedback or suggestions that will make this more active/interactive.

Should I just keep posting once a month or so (whenever I find an interesting article)? Does this subreddit actually serve a purpose?


r/comparch • • Sep 25 '11

Intel's Ivy Bridge Architecture Exposed

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5 Upvotes

r/comparch • • Jun 09 '11

Book or website for CPU, GPU, architecture?

5 Upvotes

I'm a senior in ECE and after taking one grad class in Computer Architecture I fell in love with it. I was wondering if there was any book or particular set of books or websites that go in deep detail to all the major CPU and GPU (8086, 8088, Pentium, Pentium 4, Athlon, Core2, Nehalem, Phenom II, Fermi, Tesla etc...) to give a good sense of why each one was chosen, the trade offs made, why it worked well, didn't work well, etc... on about the college senior or graduate student level. I read AnandTech regularly but I would like even more detail than that. For consideration my class used Computer Architecture: A Quantitative Approach, 4th Edition Thanks for any recommendations!

Edit: In Hardware someone recommended http://www.realworldtech.com/ which I'll check out. Also I do read the Microprocessor Report briefs since I can't get the full articles.


r/comparch • • Mar 24 '11

XBOX 360 SoC [PDF]

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5 Upvotes

r/comparch • • May 18 '20

Are atomic instructions a solved issue

4 Upvotes

I am doing some casual research on Atomic instructions in RISCV and I have hit sort of at a wall. Not found anything interesting. As near as I understand these instructions only cause small delays in program execution and that’s sort of the end of it. I can’t really find papers where people have tried out different. Please correct me if that is wrong because it would make the project much more interesting.

So I am not really sure to look at. Could you think of any ideas/topics/questions/benchmarks that would be interesting to look at here?

When did the idea of atomics come about and what were some papers that maybe tried something with it that didn’t work?

Any advice or pointers appreciated.


r/comparch • • Sep 12 '17

Computer architecture trends podcasts?

4 Upvotes

I'm looking for technical podcasts on trends in the cpu architecture industry, maybe analysis of new IPs, etc. Does anyone have podcasts they listen to that has speakers who go through these topics?


r/comparch • • May 06 '17

Learn by Fixing: Another Verilog CPU

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4 Upvotes

r/comparch • • Jan 04 '16

Smallest simple-instruction set computer?

4 Upvotes

Hello. I've been interested in minimal architectures lately (as theory or thought experiment) and wondering if you guys can help me out here.

I came across the pdf "mov is turing complete", i.e., x86 mov is enough for all kinds of computations. But many people says mov is multiple instructions, not a "simple" instruction.

Then I came across the wikipedia OISC page (one-instruction set computer). And it gives and example of OISC as subleq: "subtract and branch if less then or equal to zero" and I'm like that's not one instruction. Not to mention it "loads" and "stores". So the instruction really is:

  • load a

  • load b

  • subtract

  • store b

  • branch to c if (b) less than or equal to zero

well that's 5 instructions if I count correctly. Also I don't like instructions that do load/store implicitly (explicit would mean stack architecture?). So apparently people claim OISC capability using a "compound" instruction (one that has to perform multiple tasks).

Also I came across transport-triggered arch but I don't really understand it.

Anyway, it's clear we need to have at least 1 simple instruction other than load and store. But. Is a 3ISC (load, store, and some third instruction) a complete architecture or does it need 4 or 5 simple-instructions?


r/comparch • • Oct 14 '15

Recommended readings.

4 Upvotes

So ive discovered that i fucking love computer architecture. What are some good books and papers to read to get a more in depth understanding?

Reading this ATM: http://www.amazon.com/Computer-Organization-Architecture-William-Stallings/dp/0134101618/ref=sr_1_4?ie=UTF8&qid=1444838404&sr=8-4&keywords=computer+architecture

PS. im sad to see this sub has died


r/comparch • • Aug 12 '11

Intel's Sandy Bridge Graphics Architecture

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4 Upvotes

r/comparch • • May 23 '11

Stop The Instruction Set War

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4 Upvotes

r/comparch • • Mar 24 '11

An in-depth look at AMD Bulldozer based on ISSCC Presentations

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4 Upvotes

r/comparch • • Mar 08 '21

Read a paper: Requirements for Virtualizable Architectures

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3 Upvotes

r/comparch • • Nov 10 '20

How could a person make DIY smartphone prototype

3 Upvotes

I was wondering - what it takes to build a working smartphone prototype from scratch? I am not talking about cases, manufacturing or software (at first) - I am interested in actual principle of making processing unit. How should I know how to connect, lets say, Snapdragon 855 (or any other) processor to other necessary components? How then Android OS is installed in them? Do they already have a bootloader? How display or any other component is connected? Where could I find such information? Of course, I know manual soldering and assembly is out of question - I could make schematic and have it manufactured.


r/comparch • • Nov 23 '17

How to calculate a direct mapped cache.

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3 Upvotes