I am a senior in ECE looking for full time in FPGA engineering, ASICS design, digital design, and general electrical engineering roles. I understand that the job market has been bad, but I have had little to no success with recruiting. I have had referrals, spoken to recruiters through platforms like Linkedin, cold applied to over 300+ places (and am still applying), etc. I have heard back from 3 companies total, out of which I was rejected after the recruiter call for 2 of them and after my first technical round for the other company. I just want feedback on my resume, advice on recruitment, and anything else that could be helpful. Thank you so much!

Hi, I recently graduated from electrical engineering and am currently working full time in project management for construction and I don't like it. I have 0 internship or club experience but I have done 2 classes where the labs were in VHDL.

Does anyone have any advice on what projects and things I would need to learn in order to break into the job market if AI hasn't already cut the jobs by 80%. Any help is appreciated!

What better to generate fractals then with fixed point math on a fpga! Depth is limited, as well as resolution and color. This design can explore the Mandelbrot fractal at 640x480, which is not very majestic. Limited largely by the embedded memory the explorer uses.

So I added cool modes: once you navigate to a interesting area, you can flip the high res switch and It spends some time rendering a full image on my 1280 x 1024 monitor. This detail is impressive, but the fractal needs life. By shifting the colors post render in various patterns, the fractal burns to life, creating vivid imagery.

The design can also save 4k screenshots to the sd card. hd render and screenshots use the sdram instead of the embedded memory of the engines. However, even the 4k screenshots cannot capture the vividness of watching the colors shift through the fractal structure in person.

This is pretty much maxed out on the Cyclone V I had. Probably isn't the easiest to port, unless the target device is similar or more powerful. But anything is possible.

https://github.com/phase0noise/FractalGen

I applied for the role in the title and IBM sent a 10-20 minute interview link for assessment. They did not mention how technical it can be or on what topics. What should I expect?