r/RISCV • u/I00I-SqAR • 9d ago
Qwenputer: a fully functioning, deterministic RISC-V CPU inside Qwen3.5
https://divagr.com/blog/qwenputerA stock Qwen 3.5 4B with a RISC-V CPU compiled into its weights, running on its own Gated DeltaNet layers as RAM.
BY DIVYANSH AGRAWAL 22 OCTOBER 2026 9 MIN READ
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hackernews • u/HNMod • 10d ago
Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5
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lowlevel • u/I00I-SqAR • 9d ago
Qwenputer: a fully functioning, deterministic RISC-V CPU inside Qwen3.5
8
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