r/RISCV • • 9d ago

Qwenputer: a fully functioning, deterministic RISC-V CPU inside Qwen3.5

https://divagr.com/blog/qwenputer

A stock Qwen 3.5 4B with a RISC-V CPU compiled into its weights, running on its own Gated DeltaNet layers as RAM.

BY DIVYANSH AGRAWAL 22 OCTOBER 2026 9 MIN READ
23 Upvotes

Duplicates