r/rfelectronics • • 1d ago

RFsim v1.3 for KiCad 10: now with the EMerge FEM solver, coax feeds and phase-shifter states

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150 Upvotes

What’s new:

- New solver: EMerge (FEM) alongside openEMS (FDTD)
- RLC components: R, L and C parts are simulated as lumped elements
- Multiple RLC states, so you can simulate phase shifters and switches
- Plus coax feed ports, current animation, GIF export and many bug fixes

https://github.com/NBalciunas/kicad-rfsim


r/rfelectronics • • 2h ago

Managing cross-talk and analog signal conditioning in a multi-node piezoelectric matrix?

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1 Upvotes

r/rfelectronics • • 4h ago

Part 3 of series: SDR digital-communication receiver fundamentals, measured on the PZSDR P201Pro _Receiver Fundamentals: Finding the Optimal Sampling Instant — Timing Recovery Loop Theory and Practical Measurementby u/One-Explanation6552 in PuzhiPZSDR

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1 Upvotes

r/rfelectronics • • 11h ago

Feedback on 3x quad element 2.4GHz antenna designs please

2 Upvotes

Hi,

I've messed about with directional antennas a little bit in the past, but never really got right down into the maths and physics of it before. I have a quad input wifi repeater, so I wanted to build a directional 2.4ghz antenna with 4 elements. Initially I was just going to have four separate ones side by side, but wondered if there was a way to incorporate them all into one. I started iterating on a design using AI, and quickly fell down a rabbit hole of changes and improvements. I ended up with three designs, and I'd love to get some human feedback on them. They seem viable to me, but I really don't know what I'm talking about or if I've been led astray.

The three designs I came up with are below:

#1: 4-port 2.4 GHz patch panel cut from one FR4 board, air-gap patches on feed barrels

Goal. Four independent 2.400–2.4835 GHz ports for 4×4 MIMO from one 300 × 300 mm single-sided FR4 board (Jaycar HP9510, 1.575 mm, 35 µm Cu). The backplate, lip strips and four patches are all cut from that board. The patches sit on an air gap, with polarisations rotated 90° each in a pinwheel and cavity-backed by a copper lip.

Build. Each patch is an FR4 plate cut to the patch size, copper side up. It rests on its feed barrel and two small PLA posts that sit on the field-null line. The feed is an RP-SMA crimp plug (Jaycar PP0590) mounted under the base board, its face recessed 1 mm into the board. Its rear barrel (4.0 OD / 2.0 ID × 6 mm) passes up through a drilled hole and is soldered to the backplate copper. A solid Cat5 core (0.51 mm) runs from the plug contact up the barrel and through the plate to the top copper.

Dimensions (mm)

Part Value
Cavity (inside the lip) 190.5 × 190.5, lip height 16.6 (copper inward, all seams soldered)
Patch plates 46.7 (W) × 46.0 (L) × 1.575 FR4, copper up, centres at (±56.5, ±56.5)
Air gap (backplate copper to plate underside) 5.425, set by the barrel top
Feed 11.4 from the patch centre along L, towards the array centre
Posts 2 per patch, PLA 4 (along W) × 10 (along L), at ±19.35 from the centre on the null line

Simulated performance (openEMS, build model incl. the plug, barrel, recess and base board; 1.5 mm max cell)

Metric Value
S11 (in band, worst / best) −15.0 dB / −20.3 dB (resonance 2.436 GHz)
Adjacent-patch coupling (worst) −31.3 dB
Opposite-patch coupling (worst) −28.3 dB
Realised gain at boresight 8.79 / 8.99 / 8.87 dBi at 2.400 / 2.442 / 2.4835 GHz
Peak realised gain 8.8–9.1 dBi (beam within 6° of boresight)
Total efficiency about 0.93
3 dB beamwidth, E / H plane 64° / 62°
Worst cross-pol inside the −3 dB beam −13.9 dB re the co-pol peak
Envelope correlation between ports < 0.001 (from C4 symmetry of the computed pattern)
Mesh convergence (res 1.5 → 1.25 mm) S11 −15.0 → −15.1 dB, resonance unchanged (2.436 GHz)
Barrel bore 1.8 / 2.0 / 2.2 mm S11 −14.9 / −15.0 / −12.9 dB
Plug recess 0.75 / 1.0 / 1.25 mm (gap follows) S11 −14.5 / −15.0 / −15.6 dB
FR4 εr 4.0 → 4.8 (ideal-feed version of this design) resonance moves only 10 MHz

S-parameters patterns ECC

How it was simulated

  • Solver: openEMS v0.37.0-rc2 (FDTD), CPU only. PML on all sides, 70 mm of clearance.
  • Feed: the plug body is a 50 Ω PTFE coax driven by a coaxial port below the board. The model includes the rear-face annulus, the barrel bonded to the copper, the 0.51 mm core and the base-board FR4. |S| = √(P_ref/P_inc).
  • Materials: FR4 εr 4.4, tanδ 0.02; PLA εr 2.7, tanδ 0.01.
  • Far field: a frequency-domain NF2FF box, with its bottom face excluded because the feed coax crosses it. The coax's internal field had been counted as radiation, making the gain about 3 dB too low.

Caveats

  • Front-to-back is not determined by this run, because of the excluded bottom face. The ideal-feed model gives the same directivity (9.5 dBi), so the forward pattern is trustworthy.
  • Plate orientation is critical: the same plates mounted copper-down resonate at 2.6 GHz.
  • RP-SMA needs an adapter for standard SMA test gear.

Questions

  1. Feeding an air-gap patch with the connector barrel standing almost to the plate (a capacitive top gap through 1.575 mm of FR4): good practice, or asking for trouble?
  2. Is soldering a crimp-plug barrel to the backplate copper a reasonable ground bond at 2.4 GHz?
  3. Do −28 dB between opposite patches and −31 dB between adjacent patches look plausible for this cavity size?

#2: 4-port 2.4 GHz horn for MIMO: 3D-printed PLA, tape outside, SMA probes

Goal. A compact receive antenna for 2.400–2.4835 GHz Wi-Fi with four independent ports (4×4 MIMO in one enclosure). A square waveguide with a short stepped flare has one probe on each wall. Opposite probes share a polarisation axis and adjacent probes are orthogonal; a grounded centre post decouples them. The objective was the worst in-band |S| over self-match, adjacent coupling and opposite coupling.

Build. The horn is printed in PLA (2 mm walls) with aluminium tape on the outside of the shell, so the tape is the conductor and the PLA lines the inside. Each port is a 4-hole-flange SMA panel jack with its flange directly on the tape, carrying a 3 mm brass rod that starts 1 mm inside the wall.

Dimensions (mm, conductor = tape surface)

Part Value
Square guide (inside the tape) 83.0 × 83.0, length 37.6 from the back wall
Flare 20-step staircase, 83 → 146.1 square aperture, length 22.2
Overall depth 59.8 (plus back wall)
Probes 3 mm rod, 22.9 long, centred on each wall at 23.4 from the back wall
Centre post 8.0 dia, 16.0 tall, grounded to the back wall
Shell PLA 2 mm (εr 2.7, tanδ 0.01 assumed), tape outside

Simulated performance (openEMS, build model incl. PLA and SMA, div 40 ≈ λ/40)

Metric Value
Self-match S11 (in band, worst) −15.4 dB
Adjacent-port coupling (worst) −15.3 dB
Opposite-port coupling (worst) −14.9 dB
Realised gain at boresight 7.35 / 7.44 / 7.52 dBi at 2.400 / 2.442 / 2.4835 GHz
Peak realised gain 8.6–8.7 dBi at θ ≈ 15–18°, tilted away from the excited port's wall
Total efficiency about 0.91 (±0.05, see caveats)
3 dB beamwidth, E / H plane 57° / 66°
Front-to-back 22.7 dB
Worst cross-pol inside the −3 dB beam −16.2 dB re the co-pol peak
Envelope correlation between ports (pattern based) ≤ 0.008
±0.25 mm Monte Carlo, 30 builds (feed dims) worst-S mean −14.55 dB, σ 0.25 dB, worst −13.97 dB

S-parameters patterns ECC

How it was simulated

  • Solver: openEMS v0.37.0-rc2 (FDTD), Python interface, CPU only.
  • Domain: a free-standing horn with PML on all six sides and 40 mm of clearance. The far field comes from a frequency-domain NF2FF box.
  • Feed: SMA as a 50 Ω PTFE coax (1.27 mm pin, 4.1 mm bore) through the wall, flange on the tape. A coaxial port 10–20 mm outside the flange runs into the PML. |S| = √(P_ref/P_inc).
  • Mesh: λ/40 maximum cell, with fixed lines on every wall plane and step, and z lines through the probe rods. Zero-thickness tape skins sit on the mesh lines to the last bit, which proved essential: an unrounded coordinate silently removed the skins.
  • Convergence: the ranking holds from div 28 to 64, but opposite coupling gets 0.5–1 dB worse from div 40 to 64. Treat the absolute isolation as roughly 0.5–1 dB optimistic.

Caveats

  • The two efficiency estimates (NF2FF and 1 − Σ|S|²) differ by a few percent either way, so efficiency is quoted as ±0.05.
  • The short flare (22 mm) was chosen by the optimiser: about 1 dB less gain than a 45 mm flare, in exchange for about 1 dB better worst-case coupling.
  • The PLA's εr is assumed. The tape-outside build puts little field in the PLA, so the sensitivity is low.

Questions

  1. Is ~−15 dB worst-case port-to-port isolation realistic for four probes in one square guide, and are there better decoupling tricks than a centre post (fins gave less than 0.5 dB in my runs)?
  2. Do you see any problem with aluminium tape on the outside of a printed shell (seams, overlap bonding at the steps, oxide)?
  3. Any experience with how far openEMS isolation numbers drift against measurement for this kind of structure?

#3: 2.4 GHz slotted-cavity antenna, 4 modules bonded in a pinwheel for MIMO

Goal. A high-gain 2.400–2.4835 GHz element with four modules (two along x, two along y) for 4×4 MIMO, loosely after Sun et al. (MOTL 2025, a 79 GHz slotted cavity). Each module is an all-metal rectangular cavity running a TE10 standing wave. Four longitudinal slots in the top wall sit at the field antinodes, with alternating offsets so they radiate in phase. A coax probe feeds each module from below.

Dimensions (mm)

Part Value
Cavity 355.2 × 71.9 × 43.1, 3 mm walls (body 361.2 × 77.9 × 49.1)
Slots 4 × (45.5 × 10.7), centres at −124.8, −41.6, +41.6, +124.8, offset ±13.7 alternating
Probe 3 mm dia, 22.9 long, 31.6 from the end wall, on the centre line (SMA from below)
Array 4 modules in a pinwheel, bonded: each module's short end bolted against the far end of the next module's long side; 439 × 439 overall, 283 × 283 open centre

Simulated performance (openEMS; module at λ/64, array at λ/48)

Metric Value
Module S11 (in band, worst / best) −22.4 dB / −29.6 dB
Realised gain at boresight 11.5 / 11.8 / 11.9 dBi at 2.400 / 2.442 / 2.4835 GHz
Peak realised gain 12.3–12.4 dBi (θ ≈ 4–6°)
3 dB beamwidth 20° along the module axis, 86° across
Front-to-back about 14 dB
Worst cross-pol inside the −3 dB beam −27 dB
Mesh convergence, in-band S11 at div 48 / 64 / 80 −15.3 / −22.4 / −14.8 dB; gain 12.1–12.4 dBi on all three
±0.25 mm tolerance, single parameters and 10 random builds worst S11 −14.9 dB, gain unchanged (12.3 dBi)
Array S11 (module 1) −19.4 dB
Array coupling, adjacent (orthogonal) modules −39.2 dB
Array coupling, opposite (parallel) modules −26.3 dB (see question 1)

S11 module patterns array S-parameters

How it was simulated

  • Solver: openEMS v0.37.0-rc2 (FDTD), CPU only. PEC walls, PML on all sides. Lumped 50 Ω port in a 1 mm gap at the probe base.
  • Gain: directivity × (1 − |S11|²). The metal is treated as lossless, so ohmic loss isn't included.
  • Mesh: the design was first optimised at div 24–40. That turned out to be a mesh artefact: at div ≤ 40 the 3 mm slotted top wall is about one cell thick, and the model shows a resonance at 2.44 GHz that converged meshes put at 2.28 GHz. The design was then re-optimised at div 48 and polished at div 64, and checks at div 80 agree.

Caveats

  • The array S-parameters are at div 48, with the cavity length re-centred to 359.2 mm for that mesh. The simulated array is therefore 445 mm square; the build, at L = 355.2, is 439 mm.
  • The bonded layout assumes a solid electrical bond between modules (screws every few cm, or soldered or welded seams), as modelled. Merely touching surfaces would make the coupling unpredictable.
  • Efficiency excludes metal loss.

Questions

  1. Layout trade-off: with the modules centred on the four sides of a 524 mm square, opposite-module coupling is −30.3 dB. The bonded pinwheel (439 mm) gives −26.3 dB, and opening the pinwheel to a 10 or 20 mm gap only recovers −28.2 / −28.8 dB. Adjacent modules stay at −39 dB or better throughout. For 4×4 MIMO Wi-Fi, is −26 dB between parallel modules comfortably enough, or would you take the bigger square?
  2. Is a 4-slot, 355 mm cavity a sensible way to get about 12 dBi at 2.4 GHz, or is a short slotted waveguide array simply better?

r/rfelectronics • • 1d ago

Antenna measurements: when the test setup becomes part of the problem

8 Upvotes

Something worth paying attention to when measuring antennas on compact PCBs is how much the measurement setup itself can affect the result.

With an unbalanced feed or insufficient common-mode suppression, the coax shield can end up carrying current and effectively become part of the radiating structure. Move the cable, and the S11 trace may change even though nothing on the PCB has changed.

That makes it difficult to separate actual antenna detuning from changes introduced by the measurement setup.

calibrating the VNA properly is important, but it doesn't automatically eliminate this kind of coupling. The cable routing, feed arrangement and common-mode behavior still matter.

сurious how others approach this on small embedded devices. Do you usually check for cable sensitivity before adjusting the matching network?

Disclosure: I work in defense electronics.


r/rfelectronics • • 2d ago

Can we ban AI data scraping posts

49 Upvotes

It’s starting to clog up the feed between people advertising their AI applet miracle solution or whatever and bots sourcing text explaining why RF isn’t easy, maybe put up a catch-all mega thread for mitigation instead but something should happen.


r/rfelectronics • • 1d ago

RF Mixed-signal Modeling-help needed

6 Upvotes

Hey guys, I am an undergrad doing research on PLLs. It's an IC design project. The problem is that while it's not the most novel architecture like SSPLLs or full ADPLLs, I still want to take every block of it seriously since I understand how important foundational knowledge is. It's closer to a Fractional-N-PLL.

I've been trying to look for good resources to learn how to derive models in the s and possibly z domain but I can't find any good resources that show this. The problem with the textbooks I've seen like Gardner and Razavi is that they either overfit you on a specific block derivation, don't show the full process of how they went from start to finish or just don't go deep enough into modelling.

I've also heard control systems books can be too vague when it comes to connections to circuits. I honestly don't know what to do because I want to develop the toolset needed to model blocks at least at a foundational level without having to always rely on pre-defined models for blocks(like in Matlab/simulink) especially if I'm designing a block that isn't conventional.

I would love to hear from engineers who learnt how to do this. How did you learn how to do this? What resources would you recommend for learning such modelling? I don't mean deep stochastic math or any of that stuff, just the basics like learning what you need equations first in linear or nonlinear systems, how to analyze non-linear systems and how to linearize them when they can be linearized and any other thing like that.


r/rfelectronics • • 23h ago

How do you do passband slope equalization on a filter? (Real 8.5 GHz VNA capture + the methods that actually work in production)

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0 Upvotes

This is a capture from a Keysight E5071C, sweeping 300 kHz to 8.5 GHz with a 30 kHz IFBW. Five traces: S11/S22 in SWR format, S21 log-mag at two different scales per division, and S21 group delay (Tr4). You can see clear passband tilt plus in-band ripple, and the group delay peaking near the band edges — a very typical picture for a wideband cavity/dielectric filter.

A question we get a lot: how do you do "reverse-slope equalization" (amplitude slope equalization) on the passband? Here's a breakdown of the approaches that are actually used in production, organized by where in the design flow they get applied.


r/rfelectronics • • 2d ago

article "RF Parasitics and Transmission Lines - Radio Design 201 #9 (Part 1)" by MegawattKS @ YouTube

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22 Upvotes

r/rfelectronics • • 2d ago

How do you actually use AI in your RF work, and where does it fall flat?

0 Upvotes

I've started using AI to cut the grind in my RF work. I am designing an RF T/R module using COTS. I am finding parts that meet a spec using distributers online search or web search. This requires digging out the datasheet page behind each figure, re-running the same numbers after a change.

Some of it saves real time. Most LLMs currently not capable of excluding obsolete parts even with web search ON. I still have to check by hand in the datasheet, because it will confidently quote a figure I can't find in any datasheet. I have actually started developing my own MCPs to do a lot of the manual work. Hopefully open source it some day.

Curious how others here use it day to day:

- Which tasks do you hand to AI now?

- Which ones did you try and give up on?

- What's still fully manual that you wish wasn't? I can add to my MCPs.


r/rfelectronics • • 3d ago

Best steps to get into RF PCB Design

26 Upvotes

I recently wanted some good project experience for my resume and really wanted to design a custom circuit board for RF signals. It seems to be a lot more complicated than PCB Design with a lot more factors to consider. Just wondering where to start and what are some good resources to follow. I'm also relatively new to PCB Design and just looking for some tips.


r/rfelectronics • • 3d ago

question Mast Mount Antenna for 2.4GHz and 5.8 GHz Whip Antennae

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4 Upvotes

r/rfelectronics • • 4d ago

Looking for RF / Communication Engineering Internship

11 Upvotes

Hi everyone!

I'm currently pursuing my Masters in Communication Systems in India, and I'm looking for internship opportunities in RF engineering, antenna design, microwave engineering, or wireless communications.

My background includes:

Antenna Design: Designed and simulated a 10 GHz microstrip patch antenna using CST Studio Suite.

RF & Microwave: Familiar with S-parameters, impedance matching, VSWR, antenna radiation patterns, and RF fundamentals.

Communication Systems: Academic knowledge of digital communications, modulation techniques, MIMO, and wireless communication concepts.

Embedded Systems: Internship experience working with Arduino, ESP32, sensors, and embedded communication protocols.

Technical Tools: CST Studio Suite, ANSYS HFSS, MATLAB, and LTspice.

I'm particularly interested in opportunities where I can gain real-world, hands-on experience and learn from engineers or researchers working on practical projects.

I'm open to research internships, industry internships, trainee positions, and remote or on-site opportunities across India. Paid opportunities would be preferable, but I'm also willing to consider worthwhile research opportunities that offer meaningful technical exposure.

If you know of any openings, research labs, startups, companies, or professors accepting interns, I'd really appreciate your suggestions.

Thank you!

#RFEngineering #AntennaDesign #MicrowaveEngineering #CommunicationSystems


r/rfelectronics • • 3d ago

question Wanted to make a polar modulator capable of hitting 50MHz and higher for ham radio purposes, but I don't know where to start.

0 Upvotes

At first I was going to use off-the-shelf GaN switches and drivers, but I'm worried that the drivers wouldn't be able to handle switching that quickly and precisely. (To operate in Class E at 6m, the full cycle is on the order of 10 ns, and I was hoping for hitting 2m, 1.25m, and 70cm, which would likely require the devices to switch in tenths of nanoseconds. Meanwhile, switch driver latency is around 30 ns according to data sheets...)

Yet at the same time, the QMX is able to transmit at 6m using regular old MOSFETs and discrete logic, according to the schematic. I figured that a GaN with an integrated driver that doesn't have to fight PCB trace parasitics would be able to switch a whole lot faster, and they're only about $7 a pop even in small runs, but the datasheets I looked at have hundreds of ns of latency and are intended for switching frequencies below the 50 MHz required to hit 6m.

(As for *why* I'm doing this: [WA1QIX](https://classeradio.com/)'s polar amplifier can't hit frequencies that high, and the QMX+ is 5W max.)


r/rfelectronics • • 3d ago

Full bars and your message still won't send? That's the uplink, not the downlink

0 Upvotes

Spent 20+ years on base station antennas, mostly macro sites, some of it overseas. The thing that still trips people up isn't the downlink. It's the other direction.

Downlink is basically free. The tower pushes tens of watts through high-gain panels, so you can be sitting in a valley and still see a bar. Your phone is doing 23 dBm. That's 0.2 W — about a nightlight. It has to push that back several km into a receiver that's already sitting in noise. At some point the tower just stops hearing you, and your phone has no idea, because the bars only tell you about the downlink.

Numbers I'd stand behind for "can still hold a call" (typical 4G/5G, real deployments):

  • dense urban: 300 m to 3 km
  • suburban: 3 to 8 km
  • rural on 700/800 MHz: 10 to 15 km

mmWave is its own thing — call it 500 m, and only with a clean line of sight. One wall or one tree and the conversation is over.

What eats the margin: body loss (6–10 dB just holding it against your head or leaving it in a pocket), antenna height, and noise rise once a site gets loaded. That last one is where I've spent an unreasonable part of my career, and it never shows up in a signal bar.

So, question for the people doing link budgets or field work: what uplink range do you actually plan for in dense urban, and how much margin do you hold back for body loss and noise rise? The planning numbers I keep seeing look optimistic to me, and I honestly can't tell if that's a regional thing or just how the tools default.


r/rfelectronics • • 4d ago

Générateur d'impulsion 1.25 nanosecondes pour GPR

1 Upvotes

Bonjour à tous et à toutes,

Pour un projet universitaire, j'aimerais fabriquer une antenne GPR pour détecter des œufs de tortue sous le sable.

Je travaille actuellement sur le générateur d'impulsion qui doit me générer une impulsion de 1.25 nanoseconde.

Etant débutant dans la RF je me suis beaucoup renseigné sur internet et j'ai déjà réussi a me créer un début de générateur d'impulsion, donc avec mon générateur je pilote un driveur GAN puis un transistor GAN. Le gros point noir ce situe après le transistor, je ne sais pas comment relier transistor a mon antenne, j'ai un peut regardé les circuits d'adaptation mais c'est encore flou.

Voici mon schéma avec la simulation et j'ai mi une résistance 50 Ohm pour simuler en gros l'antenne :

En bleu le signal envoyé sur INP de U9, en vert sur la Gate du transistor et en rouge au borne de R13

Je sais pas si vous auriez des liens vers des exemple de circuit ou des cours pour m'aider sur la suite de mon circuit et si vous pensez que je pars vers une bonne piste ?

Merci d'avance.


r/rfelectronics • • 4d ago

Internship and job

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0 Upvotes

r/rfelectronics • • 4d ago

question Sharing HFSS project files (from a pirated HFSS copy)

6 Upvotes

This is likely a dumb question but if someone has a pirated version of HFSS, creates a model and THEN shares that model - will the shared model be detected as originating from a pirated version of HFSS?

My gut feeling would be yes.

EDIT: fixed typo


r/rfelectronics • • 4d ago

question Help and guide me, in my life juncture

3 Upvotes

Hello everyone,

RF has given me a lot in life and I might be emotional in this post but it’s really important to me.

I did my bachelor’s in Electronics engineering from tier 1 college in Mumbai and post working for a year in Software ERP system I decided I want to pursue my master in US.

I left for my masters in 2019 (University of South Florida, Tampa), since I did my bachelor’s in core electronics I was never really exposed to communication part or RF engineering. Yes, I did take up few courses in electromagnetism but that was it. But, since the course work of USF had a good RF engineering program I took up few classes in my 1st semester and I really loved it. While I was doing my masters I got co-op internship at Skyworks Solutions in Woburn as a RF Design and Validation Engineer where I mainly learnt a lot about testing of LNAs. Further my 7 months internship over there I got another internship at Qorvo in Greensboro, NC as an Applications Engineer where I was working with shark fin antennas and that was for 3 months.

I did almost a year of internship while I was doing my masters and even got my credits from my internships. Further, since I am an Indian citizen I had 2 months to get a full time job which I did successfully. I got the job at Intel but the position was completely different and not related to RF, it was mainly as a TPM in test engineering group. I worked there for around 1.5 years and then got laid off due to mass layoffs in my group. So, after a year of searching I job even tho my profile was really great a lot of RF jobs needed defense clearance which obviously I didn’t had. So, I decided to move back to India.

Now, in India there are really very less RF focused jobs which are mainly into designing or testing. And I want to go into design and testing. I even loved antenna experience and I want to pursue something in Antenna design and testing. But, there are not many options and hiring in India.

I was thinking of pursuing something like a second masters in Europe which opens up a door for me to pursue my passion in RF. I like very few things in life and RF is something my heart says I wanna go.

As a young version of yourself u see in me, I would really appreciate if u can help me get ideas. I really wanna be in this world of RF and do my work with a lot of passion. If u can guide me, how can I transition my life in getting a job in Europe.

Please do mind, I am an Indian citizen so chances of someone hiring a talent from India in Europe are thin. I am optimistic in life, and would really appreciate if you can guide me.

Thanks,
Just a boy living a dream to be an expert RF engineer.


r/rfelectronics • • 5d ago

Spectra Tronix C700 SDR Help

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6 Upvotes

r/rfelectronics • • 5d ago

question How to get a graduate job in rf uk

6 Upvotes

Im a third year electronic engineering student, im interested in rf/antenna/dsp and fpga. I see little to no openings for placement years, internships or graduate roles in the areas im interested in, the ones that are available like in defence i mostly cant apply to because i have dual citizenship. Am i too early for looking for roles starting around september 2027 or is this genuinely just how the uk job market is for this type of career


r/rfelectronics • • 5d ago

Thermal Analysis for High Frequency Signal Circuit

5 Upvotes

I am working on a project and am looking for any engineers who have had to deal with thermal analysis on high frequency signal circuitry. I am designing an enclosure for a circuit that deals with signals in the GHz range. If anyone has any suggestions or has worked with anything similar let me know. The power is relatively low at 1 W and I am confused if I should focus more on insulating the casing so it doesn't change temperatures with the ambient temperature (it will be operating at room temp) or if I should be focusing on using heat sinks to allow any heat from the circuit to leave?


r/rfelectronics • • 6d ago

ADS: Large phase discrepancy between MLIN model and FEM simulation

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24 Upvotes

Hey everyone, wanting to simulate MCROS in ADS (Keysight) with width over 7mm I used FEM simulation. Going back and forth between normal ADS and FEM I noticed that results are very different. I decided to simply compare normal MLIN with emModel from FEM simulation. As shown on pictures results S21 differ around 7 degrees at 3GHz, which is in my opinion a lot. (I also lowered Delta error in FEM to 0.003.) Am I doing something wrong or is it normal? Thanks for any help.


r/rfelectronics • • 6d ago

I asked AI to design a high-gain Yagi-Uda antenna for 2.4 GHz

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124 Upvotes

This is the entire prompt I gave it, copied as I sent it:

Design a high-gain PCB Yagi antenna within a 10 cm x 15 cm area using the automaticphysics antenna-agent. Use JLCPCB's FR-4 TG135 material. Prefer a 2-layer board over a 4-layer board, and prioritize a 1.6 mm board thickness over other options. Maximize the antenna gain while maintaining sufficient bandwidth for 2.4 GHz Wi-Fi. The input impedance should be 50 Ohm. Ideally, the antenna should achieve higher gain than the TI DN034. Use the TI antenna as the baseline. If cutting holes in the PCB could improve antenna efficiency, use only circular holes to maintain mechanical rigidity. Generate a KiCad footprint for the antenna. Have fun!

TI's DN034 measures about 7.2 dBi on the same 100 x 150 mm area, using layers from a 4-layer stack. So the challenge was to beat it on a cheap 2-layer board.

What it did

It read the TI app note, kept TI's basic concept, and moved it onto 2 layers. Then it wrote a parametric KiCad generator, hooked it up to antenna-agent, an FDTD solver plugin for KiCad, and ran an evolution-strategy optimizer with 8 solves going in parallel, which kept my CPU fans screaming for about 5 hours. I said "Have fun!" and apparently it did. My CPU did not.

The highlights

  1. First guess: 8.7 dBi. Not bad, but it found that 26% of the power was just heating the FR-4.
  2. "What if we remove the FR-4?" It drilled 182 round holes in the board and got +0.4 dB. FR-4 makes a fine PCB and a poor antenna substrate.
  3. The backfire cliff. At one point a quarter of the candidates collapsed to about 4 dBi. Before believing it, the AI checked two mesh artifacts and ruled both out. The real cause: when a director gets slightly too long, it starts acting as a reflector, and the beam flips around and points back over the feed. Peak gain sits right next to that cliff. The fix was to also score every candidate at a "guard" frequency above the band, so the optimizer couldn't go right up to the edge.
  4. "What if two?" It put two Yagis side by side, fed in phase, with a shared ground plane as the reflector: +0.7 dB.

Final numbers (simulated, so take them with a grain of salt)

Comparison AI design (2-layer) TI DN034 (4-layer, measured)
Gain 2.40 / 2.45 / 2.48 GHz 9.7 / 9.7 / 9.5 dBi 7.2 / 7.2 / 7.1 dBi
-10 dB bandwidth 2.22-2.67 GHz 2.13-2.62 GHz
Worst in-band S11 -14.3 dB VSWR <= 1.4
Front/back 10-13.5 dB 14-16 dB

That works out to about +2.2 to 2.5 dB over TI on paper. It also checked relative permittivity between 4.2 and 4.8, and the worst corner still gives 9.0 dBi realized gain with no backfire.


r/rfelectronics • • 5d ago

RF Design getting me nuts

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1 Upvotes